Ee392c: Advanced Topics in Computer Architecture Speculative Multithreading

The first paper for this lecture [1] categorizes various options for supporting speculative multithreading in hardware, while the second [2] describes a way to implement it in software without specific architectural support. The class discussion covered the requirements and tradeoffs of software, hardware, and hybrid support for speculative multithreading. Thread-level speculation (TLS) is a way to extract parallelism from applications where it is not easy to guarantee that threads are independent. To implement TLS an architecture must buffer state, since it needs a way to backup when a violation occurs. This paper introduces a taxonomy used to classify the approaches to buffering speculative memory state. The authors classify architectures based upon where they store their speculative memory as well as the number of speculative tasks allowed per processor. In Architecture Main Memory (AMM), committed memory is stored in the main memory system. The paper describes two flavors of AMM, lazy and eager. In eager merging, the speculative state is merged into main memory as soon as a thread commits. The next speculative thread is not allowed to become non-speculative (the head) until this data is merged. In some cases, this merging is on the critical path of the program. Lazy merging is free of this problem since thread is allowed to pass the head token before its speculative data has been transferred to main memory. In Future Main Memory (FMM), main memory contains the most recent version of each piece of data. If there are speculative versions of a section of memory, the committed state is kept in a buffer. In general, FMM performs commits faster than AMM since the formerly speculative data is already in the memory hierarchy. However, violations are more costly in FMM since it must restore the state of the memory hierarchy. They also classified speculative architectures based on how many non-committed speculative tasks can be assigned to each processor. In a Single Speculative Task (SingleT) architecture, a processor cannot be assigned another speculative task until its current task is committed. In SingleT architectures, load balancing is important since a short speculative thread will cause a processor to stall until a long head thread has completed.